The use of wireless communications for in-home, in-building networks, and direct communications, is increasing in popularity and spawning relatively new standards including, but not limited to Bluetooth, IEEE 802.11a, IEEE802.11b, et cetera. As is known for wireless communications, data is modulated onto at least one radio frequency (RF) carrier frequency and transmitted as a modulated signal by a radio transmitter. A radio receiver receives the RF modulated signal and demodulates it to recapture the data.
As is further known, there are a variety of modulation/demodulation protocols that may be used for wireless communications. Such modulation/demodulation protocols include amplitude modulation (AM), frequency modulation (FM), amplitude shift-keying (ASK), frequency shift-keying (FSK), phase shift-keying (PSK), orthogonal frequency division multiplexing (OFDM), or variations thereof. As is also know, Bluetooth utilizes an FSK modulation/demodulation protocol while IEEE 802.11a and IEEE802.11b utilize a form of PSK and/or OFDM modulation/demodulation protocol.
Regardless of the particular modulation/demodulation protocol, a radio receiver generally includes an antenna section, a filtering section, a low noise amplifier, an intermediate frequency (IF) stage, and a demodulator. In operation, the antenna section receives RF modulated signals and provides them to the filtering section, which passes RF signals of interest to the low noise amplifier. The low noise amplifier amplifies the received RF signals of interest and provides them as amplified signals to the IF stage. The IF stage includes one or more local oscillators, one or more mixers, and one or more adders to step-down the frequency of the RF signals to an intermediate frequency signals or to base-band signals. The IF stage provides the IF or base-band signals to the demodulator, which, based on the particular modulation/demodulation protocol, demodulates the signals to recapture the data.
Local oscillators within the IF stage are generally implemented using a phase locked loop (PLL) to produce a local oscillation from a reference frequency. As is known, a PLL includes a phase detector, charge pump, voltage controlled oscillator (VCO), and a divider feedback. The phase detector is operably coupled to produce a signal that represents a phase difference and/or frequency difference between a reference frequency and a feedback frequency. In many applications, a crystal oscillator generates the reference frequency, which may be in the range of 10 to 20 MHz. The feedback divider produces the feedback frequency by dividing the output frequency by a divider value. For example, if the crystal oscillator frequency is 20 MHz and the desired output frequency (i.e., the output of the VCO) is 1600 MHz, the divider feedback divides the output frequency by 80 to produce a 20 MHz feedback frequency.
When the phase and frequency of the reference frequency and feedback frequency substantially match, the PLL is locked, thus producing the desired output frequency. If the phase and/or frequency of the reference frequency differs from the phase and/or frequency of the feedback frequency, the phase detector produces a charge-up signal or a charge-down signal depending on whether the feedback frequency is too slow or too fast with respect to the reference frequency. The voltage controlled oscillator receives the charge-up or charge-down signal and increases the output frequency for a charge-up signal and decreases the output frequency for a charge-down signal. This continues until the PLL is locked.
Such a basic PLL produces a fixed output frequency (i.e., fixed local oscillation), but in many wireless applications, an adjustable local oscillation is needed. For example, in a Bluetooth wireless application, the local oscillation must have a range of 2400 MHz to 2484 MHz. To achieve this, a PLL is modified to include a selectable divider feedback that is capable of producing divider values that include an integer portion and a fractional portion. To select a particular divider value, the PLL includes a Sigma Delta modulator, which generates a digital signal that represents the fractional portion. For example, to generate a 2484 MHz local oscillation from a 20 MHz reference frequency, a divider value of 124.4 is needed. As such, the digital signal produced by the Sigma Delta modulator causes the adjustable divider feedback to jump between a 1st value (e.g., 124) and a 2nd value (e.g., 125) such that an average of 124.4 is obtained.
An issue arises with such Sigma Delta modulator circuits when the divider value is near an integer value (i.e., the fractional value is very small, e.g., 0.03 or less or is very large, e.g., 0.97 or greater). When this is the case, the Sigma Delta modulator produces very little modulation, which causes the PLL to generate fractional spurs. Such fractional spurs adversely affect the local oscillator and hence adversely affect the radio receiver and/or radio transmitter.
A further issue with PLL based local oscillators, which also adversely affect the radio receiver and/or radio transmitter is transmitter pulling. This results when the voltage controlled oscillator output is at a frequency that is substantially equal to the carrier frequency.
Therefore, a need exists for a PLL based adjustable local oscillator that overcomes transmitter pulling and substantially eliminates the generation of fractional spurs.